Daniel Garcia Briseno

Principal Software Engineer

ADNET Systems Inc - GSFC

November 2021 - Present

Lead engineer for Helioviewer.org, a web-based platform delivering solar observatory data to researchers, educators, and the public worldwide. Grew from sole developer to technical lead of a two-engineer team, owning the platform end to end, from client requirements and technical direction through development and infrastructure.

• Own technical direction and roadmap for the platform, eliciting requirements from solar physicists, translating them into scoped work, and allocating tasks across the team.
• Represent the project at conferences to grow adoption and build collaborations across the heliophysics community.
• Coordinate integrations with mission data processors and NASA's Community Coordinated Modeling Center (CCMC), surfacing defects in upstream systems and securing deployment of Surya, a heliophysics foundation model, as a new data source for the platform.
• Operate and extend a PHP-based public data API serving ~11M requests monthly across ~328K distinct IPs, embedded across external tools as data infrastructure the community builds on, as well as a web client used by ~6,000 monthly active researchers and students.
• Manage infrastructure as code with OpenTofu (Terraform) and Ansible, provisioning and configuring the production platform alongside supporting services for metrics, error tracking, and development environments.
• Engineer resilient data pipelines pulling images from 131 data sources across 15 solar observatories, publishing to the API as soon as data reaches us, with process supervision, automated recovery, and failure alerting, backed by a triage process that assigns an engineer and escalates to partner observatories when the issue is upstream.
• Incrementally modernize the web client from legacy jQuery to React, building and publishing our own components as npm packages so external projects can embed Helioviewer capabilities.

Firmware Engineer

Intel - Chandler, Arizona

August 2016 - November 2021

• Developed onboard firmware in C for Intel Optane Persistent Memory: hardware initialization and shutdown, system management algorithms (wear leveling, read/write disturb mitigation, memory refresh, temperature compensation).
• Designed and implemented a fallback logging path to onboard flash for cases where primary log storage was unavailable, a previously undebuggable failure mode, profiling the write budget available on capacitor power during shutdown to determine how much could be logged without disrupting it.
• Improved firmware logging and diagnostics under strict space constraints, extending the binary log format to capture additional debugging context and updating host-side parsing tools.
• Served as firmware liaison to the manufacturing and burn-in team, triaging failures across their burn-in firmware and our production firmware to determine which owned the issue, and resolving defects on our side.